According to white papers when the bus driver pci.sys discovers a bridge
device, it will determine if the device is initialized and if not, it will
assign the default values to the secondary interface of 64MB Memory, 64MB
Pre-Fetch and 4K IO (assuming the upstream device has enough available as
well.) What I have never heard is how pci.sys determines whether to assign
the default values or not. I had initially assumed it was looking at the
Command register (offset 0x04). I had initial success with experimentation
on this assumption, but I have recently discovered the following cases:

1. The Command register is set and resources appear to be assigned by the
BIOS, but pci.sys assigns new resources to the default values.

2. The command register is 0, but pci.sys does not assign resources to the
secondary interface, it sets the command register and leaves the rest of the
configuration space alone.

In the former case the problem must be in the BIOS. The latter case was
discovered while testing hot-plugging on a PCI-Express device so the problem
is most likely in the device's EEPROM. The latter case was also seen in both
XP and Vista.

Knowing what pci.sys is doing here would be helpful to anyone developing
devices with bridges, or writing the BIOS/UEFI.

Re: pci bus discovery by Eliyas

Eliyas
Tue Aug 08 14:15:47 CDT 2006

Response from one of the PCI developers:

In Windows Vista, when enumerating a bridge, if decodes are not enabled
(Command register does not have memory and I/O enabled) and the limit is not
less than base register value, then the PCI driver will generate a
requirement of 1MB for memory and 4K for I/O.

If a bridge is boot configured, then the PCI driver will get the same
resource assigned to the bridge unless this conflicts with a range assigned
to other devices or reserved for other purposes.

In order to generate requirements for a device behind the bridge, the PCI
driver will use a technique outlined in the PCI Local Bus spec to length the
BAR and determine the size of requirement. If the requirement exceeds the
bridge window size then the OS will trigger a rebalance and the PCI driver
will expand the bridge window and procure the resources for the device.


--
-Eliyas
This posting is provided "AS IS" with no warranties, and confers no rights.
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