Will DMA transfer diable the CPU completely as if it has been revoved from the socket?

Below is my understanding, but I am not sure of its validity. I hope
to get some comments from you.

Provided that a program want to start a DMA transfer.

1, CPU sends a start command to a DMAC (DMA Controller);

2, The DMAC signals the CPU through the HOLD pin and waits for the
CPU's acknowledgement;

3, CPU signals the DMAC through the HLDA pin;

4, Upon receiving HLDA, the DMAC starts to DMA transfer. From now on,
the CPU stops all its activities. Until the DMA process is finished,
all the interrupts can not get responses. But, the CPU's internal
status are kept, and all the interrupts' status are also kept.

5, Upon finishing the DMA transfer, the DMAC deactivate the HOLD pin,
the CPU continues to execute its instructions.


My question is the same as the title:

Will DMA transfer diable the CPU completely as if it has been revoved
from the socket?

Stephan
Fri Mar 09 13:05:25 CST 2007

Sorry but DMA transfers do *not* stop the CPU in any way. On x86, even
cache coherency is kept, i.e., cache is invalidated for memory
locations written by DMA.

Also, DMA can be initiated by busmaster devices also (e.g. PCI).

Sure there is a DMA controller on the motherboard, but this beast is
just there for backwards compatibility with the old ISA days. That is,
noone is using it anymore (expect for floppy disk access IIRC).

Stephan
---
On Mar 9, 5:58 pm, "Debug MM" <debu...@gmail.com> wrote:
> Below is my understanding, but I am not sure of its validity. I hope
> to get some comments from you.
>
> Provided that a program want to start a DMA transfer.
>
> 1, CPU sends a start command to a DMAC (DMA Controller);
>
> 2, The DMAC signals the CPU through the HOLD pin and waits for the
> CPU's acknowledgement;
>
> 3, CPU signals the DMAC through the HLDA pin;
>
> 4, Upon receiving HLDA, the DMAC starts to DMA transfer. From now on,
> the CPU stops all its activities. Until the DMA process is finished,
> all the interrupts can not get responses. But, the CPU's internal
> status are kept, and all the interrupts' status are also kept.
>
> 5, Upon finishing the DMA transfer, the DMAC deactivate the HOLD pin,
> the CPU continues to execute its instructions.
>
> My question is the same as the title:
>
> Will DMA transfer diable the CPU completely as if it has been revoved
> from the socket?