PCI-e interrupt latency & number of interrputs limitations

Hello All,

May be no one here knows a correct answer for such a close hardware
related issues, but this piece of knowledge may be very useful for
other driver developers.

In one of my previous posts I wrote about a PCI devices, located
behind PCI-to-PCI-e Bridge, the topic is located here
http://groups.google.com/group/microsoft.public.development.device.drivers/browse_thread/thread/3c71820bb5e5b463/9fb6213ca87b9dc7#9fb6213ca87b9dc7.
Drilling down to the root of the problem I discovered very strange
behavior. It seems PCI-to-PCI-e Bridge limits number of interrupts it
actually translates to the PCI-e hierarchy Root Complex. In my case I
got about 64 interrupts per second in total from all the secondary PCI
bus devices. I have checked PCI-to-PCI-e Bridges from two
manufacturers - Texas and PLX Technology - both shown very similar
picture with very minor deviations in details. No wonder I can not
work in a regular way with devices on the secondary PCI bus!
Does any one know about such limitations and the reason they exist?

With best regards,
Vladimir S. Mirgorodsky

Anatoly
Wed Oct 17 02:34:42 PDT 2007

PLX has a reference design of pcie bridge with eight bt878 on it. The bt878
alone produces more than 64 interrupts per second, and assuming their design
works, IMHO, you have a configuration problem somewhere.

Anatoly.

<v_mirgorodsky@yahoo.com> wrote in message
news:1192553332.463777.71290@k35g2000prh.googlegroups.com...
> Hello All,
>
> May be no one here knows a correct answer for such a close hardware
> related issues, but this piece of knowledge may be very useful for
> other driver developers.
>
> In one of my previous posts I wrote about a PCI devices, located
> behind PCI-to-PCI-e Bridge, the topic is located here
> http://groups.google.com/group/microsoft.public.development.device.drivers/browse_thread/thread/3c71820bb5e5b463/9fb6213ca87b9dc7#9fb6213ca87b9dc7.
> Drilling down to the root of the problem I discovered very strange
> behavior. It seems PCI-to-PCI-e Bridge limits number of interrupts it
> actually translates to the PCI-e hierarchy Root Complex. In my case I
> got about 64 interrupts per second in total from all the secondary PCI
> bus devices. I have checked PCI-to-PCI-e Bridges from two
> manufacturers - Texas and PLX Technology - both shown very similar
> picture with very minor deviations in details. No wonder I can not
> work in a regular way with devices on the secondary PCI bus!
> Does any one know about such limitations and the reason they exist?
>
> With best regards,
> Vladimir S. Mirgorodsky
>