This may be a bit off topic, if you find it to be too much so, please direct
me to the correct place...
The hardware guys that are designing a pci express device for which I am
writing the driver want to conserve some space on our ASIC (surprise,
surprise). I have informed them that it would be beneficial if our ASIC's
DMA controller had a 64 bit host address register so that our device can
perform a DMA to memory above 4GB. Their solution was just to add 5 bits to
the register to allow the ASIC's DMA engine to address up to 128 GB of memory.
I am concerned that the LogicalAddress returned from AllocateCommonBuffer
will someday give me an address that does not correspond to the physical
memory address. It could give me something greater than 128GB, even though
there is not 128GB of memory installed, a logical bus address is, after all
not necessarily fixed to the physical address of the memory.
So do I need to instruct the hardware guys to give me a host address
register than can address the full 64 bit address range, or is their solution
of just addressing 128GB acceptable?